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B²it

What is B²it?

DNP offers B²it^TM (Buried Bump Interconnection Technology) which is a trademark of Dai Nippon Printing Co., Ltd.registered in the European Union (CTM), China, Japan, Korea and Taiwan.
We offer various line-ups such as Random Via on all layers PWB(All B²it)･Embedded PWB(E-B²it), We will contribute to the development of your products with high-function and high density wiring.

B²it PWB Development Process

In the electronics area, there are strong trends of pursuing light, compact and multi-functional products. Such trends owe to miniaturization technology of semiconductor packages such as BGA･CSP.
There are also strong needs of high-density wiring, fine pattern miniaturization of via for Printed Wiring Board (PWB) and especially Build-up PWB is expected to offer solutions to those needs.

DNP predicted such trends and has focused on developing Build-up PWB. As a result, we have successfully developed original Build-up PWB, B²it^TM(B･Square･it).

Basic Manufacturing Process of B²it

B²it stands after｢Buried Bump Interconnection Technology｣, which connects both layers with conductive bump and facilitates conductive interconnection.

1.	Conductive Ag Bumps are printed on a sheet of copper foil.

2.	Prepreg is pierced through by the Bumps.

3.	Another sheet of copper is also laminated and a two sided B²it board is manufactured.

* Click this picture to enlarge.

Merits of B²it

Followings are merits of B²it

1.	Simple Process
2.	Wide Choices of Insulation
3.	All Layers Stacked Via Random Via structure
4.	Combination with other HDI(High Density Interconnection) Technologies
5.	Various Types of Multi Layer structure

other merits are listed below.
･ Experiences of mass-manufacturing applications with high frequency and high density wiring.
(e.g. mobile and laptop PC).
･ Alliance with other PWB makers; stable supply
etc.

* Click this picture to enlarge.

1.Simple Manufacturing Process

No drilling(ALL B²it structure)
No planting→Earth Concious PWB
High density wiring(fine pattern)available(No Plating Process)

2.Wide Choices of Insulation

Insulations Available according to Characteristics Required
*Strength against Peeling :FR4
*High Heat Resistance:BT PI BN300
*Low Electronic Propagation Characteristics(PPE, PI, Teflon)
*Cost Performance (paper phenol)
Eco-friendly PEB available with Halogen-free components

3.Stacked Via/Random Via Structure

Stacked Via available: for Quad package
Random Via available
Pad on Via High Density Wiring: High Density Wiring

4.Combination with Other HDI(High Density Interconnection) Technologies

Board thickness can be adjusted with other HDI Technologies(e.g.Laser Via, Thru-hole).

5.Various Structure of Multi-layer PWB

High Freedom of Design
Wide Variation of Process & Structure